riscv_school/riscv_school_pwm
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ivanpiatak af08ededed Update README.md
2023-12-05 09:57:51 +03:00
README.md
Update README.md
2023-12-05 09:57:51 +03:00

README.md

ASIC_BE

ASIC BE flow scripts for the Cadence RTL Compiler and Cadence Encounter. Only for the educational purposes.

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Tcl 96.3%
Verilog 3.7%