riscv_school/riscv_school_scr1
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This commit is contained in:
Mikhail Yenuchenko
2026-01-21 14:59:40 +03:00
parent 10b5b08537
commit da358566a4
1 changed files with 4 additions and 4 deletions
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8
src/sdc/scr1_core_top.sdc
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@@ -34,31 +34,31 @@ set MAXRISE 1.0
set MINFALL 0
set MAXFALL 1.0
# Clock setup
set_clock_uncertainty $CLK_UNCERT [get_clocks "clk"]
set_clock_transition -rise -min $MINRISE [get_clocks "clk"]
set_clock_transition -rise -max $MAXRISE [get_clocks "clk"]
set_clock_transition -fall -min $MINFALL [get_clocks "clk"]
set_clock_transition -fall -max $MAXFALL [get_clocks "clk"]
# Ideal networks
set_ideal_network [get_ports "pwrup_rst_n"]
set_ideal_network [get_ports "rst_n"]
set_ideal_network [get_ports "cpu_rst_n"]
set_ideal_network [get_ports "test_rst_n"]
#set_ideal_network [get_ports "trst_n"]
# False paths
set_false_path -from [get_ports "pwrup_rst_n"]
set_false_path -from [get_ports "rst_n"]
set_false_path -from [get_ports "cpu_rst_n"]
set_false_path -from [get_ports "test_rst_n"]
set_false_path -from [get_ports "trst_n"]
#set_false_path -from [get_ports "trst_n"]
#IO delays:
set_input_delay -clock "clk" -max $INPUT_DELAY_CLK [all_inputs]
set_input_delay -clock "clk" -min $INPUT_DELAY_CLK [all_inputs]
set_output_delay -clock "clk" -max $OUTPUT_DELAY_CLK [all_outputs]
set_output_delay -clock "clk" -min $OUTPUT_DELAY_CLK [all_outputs]