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This commit is contained in:
Mikhail Yenuchenko
260
sim/tests/riscv_arch/Makefile
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260
sim/tests/riscv_arch/Makefile
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## @file
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## Syntacore SCR* tests
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##
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## @copyright 2015-2018 Syntacore. All rights reserved.
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## RISCV-Compliance
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##
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XLEN ?= 32
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ABI ?= ilp32
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ARCH ?=im
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override ARCH :=rv$(XLEN)$(ARCH)
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$(info >>> ARCH := $(ARCH))
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src_dir := $(CURDIR)
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RISCV_ARCH_TESTS := $(src_dir)/../../../dependencies/riscv-arch/
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#I IM IMC IC
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#EM EMC EC
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ifeq (e,$(findstring e, $(ARCH)))
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ifeq (e,$(findstring e,$(ARCH)))
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$(info >>> E32 TESTS)
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included_e += $(filter %.S,\
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$(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32e_unratified/E/src/*))
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arch_set += $(included_e)
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reference_src += $(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32e_unratified/E/*/*.reference_output)
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endif
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ifeq (c,$(findstring c,$(ARCH)))
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$(info >>> EC32 TESTS)
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included_ec += $(filter %.S,\
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$(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32e_unratified/C/src/*))
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arch_set += $(included_ec)
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reference_src += $(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32e_unratified/C/*/*.reference_output)
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endif
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ifeq (m,$(findstring m,$(ARCH)))
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$(info >>> EM32 TESTS)
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included_em += $(filter %.S,\
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$(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32e_unratified/M/src/*))
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arch_set += $(included_em)
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reference_src += $(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32e_unratified/M/*/*.reference_output)
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endif
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else ## ifdef SCR_BASE_RVE_EXT
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ifeq (i,$(findstring i, $(ARCH)))
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ifeq (i,$(findstring i,$(ARCH)))
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$(info >>> I32 TESTS)
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included_i += $(filter %.S,\
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$(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32i_m/I/src/*))
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included_ip += $(filter %.S,\
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$(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32i_m/privilege/src/*))
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included_i += $(filter %.S,\
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$(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32i_m/Zifencei/src/*))
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included_i += $(included_ip)
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arch_set += $(included_i)
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reference_src += $(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32i_m/I/*/*.reference_output)
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reference_src += $(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32i_m/privilege/*/*.reference_output)
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reference_src += $(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32i_m/Zifencei/*/*.reference_output)
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endif
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ifeq (c,$(findstring c,$(ARCH)))
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$(info >>> IC32 TESTS)
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included_ic += $(filter %.S,\
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$(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32i_m/C/src/*))
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arch_set += $(included_ic)
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reference_src += $(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32i_m/C/*/*.reference_output)
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endif
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ifeq (m,$(findstring m,$(ARCH)))
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$(info >>> IM32 TESTS)
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included_im += $(filter %.S,\
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$(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32i_m/M/src/*))
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arch_set += $(included_im)
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reference_src += $(wildcard $(RISCV_ARCH_TESTS)/riscv-test-suite/rv32i_m/M/*/*.reference_output)
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endif
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endif
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endif
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$(info >>>$(ARCH) set included)
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ifeq ($(arch_set),)
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$(info >>> No arch tests included)
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endif
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$(info >>>>> arch set: $(arch_set))
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dst_dir := $(bld_dir)
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test_name := riscv_arch
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bld_dir := $(addprefix $(dst_dir)/, $(test_name))
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obj_dir := $(bld_dir)/riscv_arch_objs
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ifeq ($(ARCH),$(filter $(ARCH),rv32im))
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cut_list += misalign-blt-01 misalign-jal-01 misalign-beq-01 misalign2-jalr-01 misalign-bgeu-01 misalign-bltu-01 misalign-bge-01 misalign-bne-01 # privilege test used mtvec
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endif
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ifeq ($(ARCH),$(filter $(ARCH),rv32ic))
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cut_list += misalign-lw-01 misalign-sh-01 misalign-lhu-01 misalign-lh-01 ecall misalign-sw-01 # privilege test used mtvec
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endif
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cut_list += bne-01 blt-01 beq-01 bge-01 jal-01 bltu-01 bgeu-01 # i - base
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cut_list += ebreak cebreak-01 cswsp-01 # C - base
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testnames := $(basename $(notdir $(arch_set)))
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filtered := $(filter-out $(cut_list),$(testnames))
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objs := $(addprefix $(bld_dir)/,$(filtered:%=%.o))
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test_elf := $(addprefix $(dst_dir)/arch_,$(filtered:%=%.elf))
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test_hex := $(addprefix $(dst_dir)/arch_,$(filtered:%=%.hex))
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test_dump := $(addprefix $(bld_dir)/arch_,$(filtered:%=%.dump))
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arch_macros_file := $(root_dir)/sim/tests/riscv_arch/model_test.h
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arch_output ?= true
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ifeq (e,$(findstring e,$(ARCH)))
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EXT_CFLAGS += -DRVTEST_E
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endif
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# Set name file for RV32I
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testnames_i := $(basename $(notdir $(included_i)))
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testnames_im := $(basename $(notdir $(included_im)))
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testnames_ic := $(basename $(notdir $(included_ic)))
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testnames_ib := $(basename $(notdir $(included_ib)))
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filtered_i := $(filter-out $(cut_list),$(testnames_i))
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filtered_im := $(filter-out $(cut_list),$(testnames_im))
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filtered_ic := $(filter-out $(cut_list),$(testnames_ic))
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filtered_ib := $(filter-out $(cut_list),$(testnames_ib))
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# Set name file for RVE
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testnames_e := $(basename $(notdir $(included_e)))
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testnames_em := $(basename $(notdir $(included_em)))
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testnames_ec := $(basename $(notdir $(included_ec)))
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filtered_e := $(filter-out $(cut_list),$(testnames_e))
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filtered_em := $(filter-out $(cut_list),$(testnames_em))
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filtered_ec := $(filter-out $(cut_list),$(testnames_ec))
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CFLAGS := -I$(inc_dir) -I$(src_dir) -DASM -mabi=$(ABI) $(EXT_CFLAGS) -DXLEN=$(XLEN) -D__riscv_xlen=$(XLEN) -w
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LDFLAGS := -static -fvisibility=hidden -nostdlib -nostartfiles -T$(inc_dir)/link.ld -march=$(ARCH) -mabi=$(ABI)
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GCCVERSIONGT7 := $(shell expr `$(RISCV_GCC) -dumpfullversion | cut -f1 -d'.'` \> 7)
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ifeq "$(GCCVERSIONGT7)" "1"
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LDFLAGS += -mno-relax
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endif
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VPATH += $(src_dir) $(bld_dir) $(obj_dir) $(asm_path) $(ref_path) $(RISCV_ARCH_TESTS)
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ifeq ($(arch_output), true)
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CFLAGS += -D_ARCH_OUTPUT
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endif
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default: clean log_requested_tgt check_version cp_asm ref_data $(test_elf) $(test_hex) $(test_dump)
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define compile_template
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$(obj_dir)/$(1).o: $(obj_dir) cp_asm
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$(RISCV_GCC) -c $$(bld_dir)/arch_asm/$(1).S $$(CFLAGS) -Wa,$(2) $(2) -o $$@
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endef
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define preprocessing
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for test_asm in $(1); do \
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march_tmp=$$test_asm ; \
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march_tmp=$${march_tmp%/src*} ; \
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march_tmp=$$(basename $$march_tmp) ; \
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file_name="$$(basename $${test_asm})" ; \
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$(RISCV_GCC) $(CFLAGS) -Wa,$(2) $(2) -E $$test_asm \
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-o $(bld_dir)/arch_asm/$$file_name ; \
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done
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endef
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define preprocessing_privilege
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for test_asm in $(1); do \
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march_tmp=$$test_asm ; \
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march_tmp=$${march_tmp%/src*} ; \
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march_tmp=$$(basename $$march_tmp) ; \
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file_name="$$(basename $${test_asm})" ; \
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$(RISCV_GCC) $(CFLAGS) -Drvtest_mtrap_routine=True -Dmhandler -Wa,$(2) $(2) -E $$test_asm \
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-o $(bld_dir)/arch_asm/$$file_name ; \
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done
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endef
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$(foreach SRC,$(filtered_i),$(eval $(call compile_template,$(SRC),-march=rv32i_zicsr_zifencei)))
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$(foreach SRC,$(filtered_im),$(eval $(call compile_template,$(SRC),-march=rv32im_zicsr_zifencei)))
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$(foreach SRC,$(filtered_ic),$(eval $(call compile_template,$(SRC),-march=rv32ic_zicsr_zifencei)))
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$(foreach SRC,$(filtered_e),$(eval $(call compile_template,$(SRC),-march=rv32e_zicsr_zifencei)))
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$(foreach SRC,$(filtered_em),$(eval $(call compile_template,$(SRC),-march=rv32em_zicsr_zifencei)))
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$(foreach SRC,$(filtered_ec),$(eval $(call compile_template,$(SRC),-march=rv32ec_zicsr_zifencei)))
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log_requested_tgt: $(bld_dir)
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$(foreach test_name, $(filtered), $(eval $(shell echo arch_$(test_name).hex >> $(bld_dir)/../test_info)))
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$(bld_dir) :
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mkdir -p $(bld_dir)
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$(obj_dir) : | ref_data
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mkdir -p $(obj_dir)
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$(dst_dir)/arch_%.elf: $(obj_dir)/%.o | $(dep_files)
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$(RISCV_GCC) $^ $(LDFLAGS) -o $@ -g
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$(dst_dir)/arch_%.hex: $(dst_dir)/arch_%.elf
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$(RISCV_OBJCOPY) $^ $@
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$(bld_dir)/arch_%.dump: $(dst_dir)/arch_%.elf
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$(RISCV_OBJDUMP) -D -w -x -S $^ > $@
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ref_data:
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mkdir -p $(bld_dir)/ref_data
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for files in $(reference_src) ; do \
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sed_input=$$files ; \
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sed_output=$$(basename $${files%.*}) ; \
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sed "s/\r$$//; \
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s/\(........\)/\1,/g; \
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s/.$$//; s/\(.*\),\(.*\),\(.*\),\(.*\)/\4,\3,\2,\1/;" \
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$$sed_input > $(bld_dir)/ref_data/$$sed_output; \
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done
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cp_asm:
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mkdir -p $(bld_dir)/arch_asm
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$(call preprocessing,$(included_i),-march=rv32i)
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$(call preprocessing_privilege,$(included_ip),-march=rv32i)
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$(call preprocessing,$(included_im),-march=rv32im)
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$(call preprocessing,$(included_ic),-march=rv32ic)
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$(call preprocessing,$(included_e),-march=rv32e)
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$(call preprocessing,$(included_em),-march=rv32em)
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$(call preprocessing,$(included_ec),-march=rv32ec)
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riscv_arch_tests_dir := $(if $(RISCV_ARCH_TESTS), $(RISCV_ARCH_TESTS), ./undefined)
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riscv_tests_commit := 9141cf9274b610d059199e8aa2e21f54a0bc6a6e
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## commit hash readed from local copy of https://github.com/riscv/riscv-arch-test.git
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tmp_commit = $(shell cd $(riscv_arch_tests_dir) 2>/dev/null && git log -1 | grep "commit" | cut -f2 -d ' ')
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is_commit_good = $(if $(subst $(riscv_tests_commit),,$(tmp_commit)),false,true)
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# Color
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RED=\033[0;31m
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NC=\033[0m
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check_version : $(riscv_arch_tests_dir)
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@if [ ! -d $(riscv_arch_tests_dir) ]; then \
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echo -e "$(RED)==========================================================================" &&\
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echo " Error! Environment variable RISCV_ARCH_TESTS='$(riscv_arch_tests_dir)' " &&\
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echo " directory not exist!" && \
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echo "==========================================================================$(NC)" ; \
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fi
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ifneq ($(is_commit_good),true)
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@echo -e "$(RED)=========================================================================="
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@echo " Warning! Execution of test code is not guaranteed "
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@echo " while using the current commit of repository located at : $(riscv_arch_tests_dir) ."
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@echo " "
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@echo " riscv_arch repository must point to commit $(riscv_tests_commit)!"
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@echo -e "==========================================================================$(NC)"
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endif
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$(riscv_arch_tests_dir) :.
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ifndef RISCV_ARCH_TESTS
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@echo -e "$(RED)=========================================================================="
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@echo " Error! Environment variable RISCV_ARCH_TESTS not set!"
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@echo " You must set the environment variable RISCV_ARCH_TESTS"
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@echo " The variable should point to the local copy of the"
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@echo " repository https://github.com/riscv/riscv-arch-test.git"
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@echo " with the commit $(riscv_tests_commit)"
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@echo -e "==========================================================================$(NC)"
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exit 1
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endif
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clean:
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$(RM) -R $(test_elf) $(test_hex) $(bld_dir)
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.PHONY: check_version clean ref_data cp_asm default
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