Update RUN_PAR.tcl
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@@ -28,7 +28,7 @@ set PAR_INIT_LEF_FILESET "/Cadence/Libs/X_FAB/XKIT/xt018/cadence/v7_0/techLEF/v7
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set PAR_REPORTS_FOLDER "../reports/reports_PaR"; # Reports folder
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set PAR_REPORTS_FOLDER "../reports/reports_PaR"; # Reports folder
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set PAR_RESULTS_FOLDER "../results/results_PaR"; # Results folder
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set PAR_RESULTS_FOLDER "../results/results_PaR"; # Results folder
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set FLOORPLAN_DIMENSIONS {200 200}; # FP chip area
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set FLOORPLAN_DIMENSIONS {9000 9000}; # FP chip area
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set FLOORPLAN_MARGINS {50 50 50 50}; #FP chip margins
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set FLOORPLAN_MARGINS {50 50 50 50}; #FP chip margins
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### ================= END of USER SETTINGS =============
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### ================= END of USER SETTINGS =============
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