Update FLOW_PAR.tcl
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@@ -13,7 +13,7 @@ if {$PaR_INIT eq "TRUE"} {
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set init_verilog ${NETLIST_PATH}/${NETLIST_TOP_NAME}; # SYN netlist file
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set init_verilog ${NETLIST_PATH}/${NETLIST_TOP_NAME}; # SYN netlist file
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set init_mmmc_file ${PAR_MMMC_FILE}; # Techmological file for multi-mode multi-corner PaR
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set init_mmmc_file ${PAR_MMMC_FILE}; # Techmological file for multi-mode multi-corner PaR
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set init_io_file ${PAR_NETLIST_TOP_PORT_FILE}; # File with location of the TOP level ports on the floorplan
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#set init_io_file ${PAR_NETLIST_TOP_PORT_FILE}; # File with location of the TOP level ports on the floorplan
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init_design
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init_design
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}
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}
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